Intel just named ten standout researchers to its 2025 Outstanding Researcher Awards, and one project in particular has direct implications for the endless quest to build cooler, faster, and more battery-friendly chips for Windows laptops, desktops, and data centers. Dr. Farzan Gity of Ireland’s Tyndall National Institute took home an award for decoding how barely-visible defects inside atom-thin materials can silently cripple a chip’s performance—and how future manufacturers might avoid them.
What Actually Changed
Intel’s annual awards recognize university research that combines fundamental insight, technical difficulty, and real-world relevance. This year, only ten names made the cut, spanning everything from AI supply-chain twins to memory safety and 3D chip cooling. Gity’s win spotlights a different challenge: what happens when transistor channels shrink to just a few atoms thick, and a single misplaced boundary between crystal grains can determine whether a device works or fails.
The awarded project, “Role of Grain Boundaries in TMDs on Carrier Transport: Identifying GB Structure-Electrical Property Correlation,” focused on two materials from the transition metal dichalcogenide (TMD) family: molybdenum disulfide (MoS₂) and tungsten diselenide (WSe₂). Both can form semiconductor layers only a handful of atoms thick, making them candidates for future transistor channels that could keep Moore’s Law ticking beyond the limits of conventional silicon.
Gity’s team did not simply confirm that grain boundaries are bad. They mapped exactly which atomic arrangements cause the most trouble for electrical current, and which ones might be tolerable. By pairing computational models with hands-on device measurements, they connected a boundary’s crystal structure directly to how much it scatters or blocks charge carriers. That turns a vague “defects are a problem” into actionable engineering data.
What It Means for You
If you use a Windows laptop, manage a fleet of business PCs, or run a data center, the immediate benefit of this research is exactly zero—no product release, no driver update, no firmware tweak. But the story matters because it points to where computing hardware is headed over the next decade.
For home and power users
Future processors built with 2D channel materials could translate into laptops that last noticeably longer on a charge. Even a modest reduction in per-transistor leakage across billions of on-chip switches can add up to hours of extra battery life under light workloads. Sustained performance in thin and light designs could also improve: when each transistor wastes less power, the whole chip runs cooler and can stay at higher clock speeds without throttling. That might mean snappier reaction times in everyday apps, or better local AI acceleration inside your next Windows Copilot+ PC without a massive battery penalty.
For IT admins and enterprise buyers
Server chips are just as hungry for efficiency gains. A 10% per-core power saving at scale can meaningfully reduce electricity costs and cooling demands in a data center. Denser transistor packing could also free up die area for larger caches or specialized accelerators—handy for virtualized Windows Server workloads, AI inference, or real-time analytics. But enterprise adoption follows a strict script: new silicon must pass exhaustive reliability testing and slot into existing manufacturing flows without blowing up costs. No IT manager will be buying servers based on TMD channels anytime soon, but the research is a necessary first step toward that option.
The catch
2D semiconductors are still a lab-scale science. Moving from a perfectly tweaked research device to millions of identical transistors on a production wafer requires solving a long list of practical problems, from uniform material growth to stable electrical contacts and gate dielectrics. The award signals that the industry is investing in answers, not that it has found them all.
How We Got Here
Silicon scaling has not been a simple shrink job for many years. Chipmakers adopted finned 3D transistors, then gate-all-around designs, and now backside power delivery just to keep performance and efficiency moving forward. As channel lengths edge closer to single-digit nanometers, the old material is hitting fundamental limits. Even a few unwanted atoms in the wrong spot can leak current, create hotspots, or scramble timing.
This is where 2D materials come in. Their extreme thinness gives the gate electrode excellent electrostatic control over the channel, which should help suppress leakage when the transistor is off. Unlike graphene, which lacks a natural bandgap, TMDs like MoS₂ and WSe₂ can act as proper semiconductors. That makes them attractive for digital logic—if they can be tamed.
Grain boundaries are an almost unavoidable fact of life when you grow crystalline films over a large area. Unlike a single perfect crystal, the material ends up as a patchwork of tiny grains with different orientations. Where those grains meet, the atomic lattice bends and breaks, creating a line of defects. In a conventional silicon transistor with a relatively thick channel, a single grain boundary typically gets averaged out. In a monolayer channel that is itself only atoms thick, there is no “around” or “bulk” to absorb the imperfection. Charge carriers hit the boundary head-on, scattering, slowing down, or getting trapped.
Earlier research knew boundaries were bad. Gity’s contribution was to rank them. By combining atomistic modelling with electrical measurements, his team showed that not all boundaries are equal. Some configurations create tall barriers that choke off current; others cause milder scattering. That distinction opens the door to smarter manufacturing—suppress the worst offenders, accept the ones you can live with—rather than chasing flawless perfection, which may never be economically feasible.
Intel’s broader award portfolio reveals the context. Other 2025 winners tackled heterogeneous AI computing, 3D thermal sensing, ferroelectric memory stacks, and digital twins for supply chains. The semiconductor roadmap is no longer a single-threaded mission of shrinking a transistor. It’s a multilayered puzzle where materials, packaging, architecture, and software all must advance together. Gity’s work fits the materials piece.
What to Do Now
For the vast majority of Windows News readers, the actionable advice is simple: stay informed, but don’t hold your breath. No PC purchase decision today should be based on the possibility of 2D transistors. Silicon—with all its well-understood strengths and limitations—will dominate for at least the remainder of this decade.
If you’re a tech enthusiast
- Watch for news from semiconductor conferences (IEDM, VLSI Symposium) on TMD-based prototypes or integrated test circuits. Bench-top demonstrations with real yield data are the next concrete milestone.
- Follow Intel’s and TSMC’s research roadmaps. When a foundry begins mentioning “2D channel materials” in public technology briefings as a node candidate rather than a research project, the timeline is firming up.
If you’re an IT decision-maker
- Note that efficiency gains from new transistor materials will land first in high-end compute (data center GPUs, AI accelerators) where the premium for bleeding-edge silicon can be justified. Consumer Windows PCs will follow later.
- Keep an eye on total cost of ownership models. A step-change in per-watt performance could alter your hardware refresh math, but not before 2030 at the earliest.
If you’re a developer or sysadmin
- The real near-term payoff isn’t in your code, but in the tools you’ll use. Better simulation models that capture defect-driven variability could improve chip design, translating into more predictable server CPU performance down the road. No action required from you.
Outlook
The Tyndall project has added a crucial layer to the 2D-materials puzzle: a detailed map of which grain boundaries to fear and which to tolerate. That knowledge will feed directly into process engineering. Researchers will try to grow MoS₂ or WSe₂ films with fewer of the destructive boundary types, or design transistor layouts that keep channels away from known trouble spots.
Several milestones will signal whether this becomes a real technology:
- Wafer-scale uniformity: Can researchers grow TMD films with controlled grain orientation across a full 300 mm wafer?
- Contacts and dielectrics: Will real transistors maintain good performance once metal electrodes and gate insulators are added, or do new interfaces re-introduce variability?
- Integrated circuits: Beyond a single transistor, do functional blocks like ring oscillators or SRAM cells work with acceptable yield?
- Reliability data: Do devices survive extended voltage and temperature stress without drifting out of spec?
None of these are solved yet. But Gity’s award confirms that Intel—and by extension the broader chip industry—views the effort as worth making. For Windows users, that’s a quiet signal that the silicon inside your next-next PC could look very different from today’s, not just smaller, but atomically smarter.